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Cadence adds Open NAND interface to flash IP

Cadence Design Systems has expanded its flash memory intellectual property (IP) offering to include support for the Open NAND Flash Interface (ONFI) 3.0 specification. 

This reflects the wider use of NAND flash in computer systems as well as for storing songs, photos, and videos in phones and handhelds. 

“System designers today see memory as a primary bandwidth bottleneck, which has given rise to many new interface standards intended to simplify design and improve overall system throughput,” said Vishal Kapoor, vice president, product marketing, SoC Realization at Cadence.  

The ONFI 3 specification is intended for processor-based platforms such as solid state drives and consumer devices such as tablets and smartphones that integrate NAND flash memory.

The new specification defines speeds of up to 400 mega-transfers per second.  In addition to the new ONFI 3 specification, the Cadence Flash and controller IP also support the Toggle 2.0 specification. 

Cadence provides a combined ONFI 3 controller and PHY IP for SoC and system design.

The Cadence controller and PHY IP implements chip-enable interleaving, which results in significantly improved system performance when dealing with multiple flash devices, as has become common in high-end mobile devices and SSDs. 

In 2010 Cadence acquired the flash IP portfolio of Denali IP.

The IP is backward-compatible with existing ONFI and Toggle standards. The existing Cadence IP offering supports the ONFI 1, ONFI 2, Toggle 1 and Toggle 2 specifications, and also provides asynchronous device support.

www.cadence.com


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