Agilent is running a Webcast on EMI/EMC challenges, and how to deal with them. It is aimed at signal integrity engineers and high speed digital engineers of multigigabit links who are running into effects previously only seen in RF and microwave circuits.
The timing is Thursday, February 16 at 7:00 am (Pacific Standard Time).
Agilent describes the webcast:
In the multigigabit era, passing EMI/EMC specs is increasingly challenging. Discovery of an EMI/EMC failure late in the project can force a recourse to makeshift solutions that add unit cost and delay time to market.
In this webcast, we explain the causes of EMI/EMC and propose a proactive methodology that we dub “Virtual EMI lab.” This methods uses EM simulation to identify and mitigate issues early in the design when many more design options are available. The “Virtual EMI lab” discipline includes both pre-manufacture EM simulations and methodology refinement via post-manufacture co-relation against measured data from EM chambers and EM scans. Our examples include: trace emission from MA/CMD memory, return-current emission on data nets on packages, SSO emission due to Icc(t), and HDMI cable emission due to grounding issues between the connector and the PCB.
The presenter is Dr. Hany Fahmy, High-Speed Digital Application Expert at Agilent Technologies. He is described as a technologist of high-speed digital interfaces for signal integrity and electromagnetic compatibility.
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