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CEVA-XC323 DSP core design kit supports multi-standards

CEVA has announced the availability of a silicon-based, software development kit (SDK) for runtime software development based on the CEVA-XC323 DSP architecture.

The CEVA-XC323 silicon embedded in the SDK was designed by CEVA and manufactured on a 65nm process, delivering up to 800MHz performance.

The expectation is that this level of performance will support the design of software-based modems and associated application software, running multiple mobile standards in parallel. 

The CEVA-XC SDK enables the full implementation of the physical layer (PHY) signal processing in software for a range of communication standards, including LTE, LTE-Advanced, HSPA+, HSPA, TD-SCDMA, WiFi, DTV demodulation, digital radio, and GPS.

“This fundamentally reduces the cost, risk and design efforts associated with supporting still-evolving standards and bringing multi-mode communication designs to production silicon for our customers,” said Eran Briman, vice president of marketing at CEVA.

The development kit includes: 6.5Gbit/s optical transceiver, dual port 1Gbps Ethernet, 1GB of DDR2 memories, 64MB SSRAM memories, HDMI in/out ports, dual Serial Rapid IO transceivers, and multiple large FPGA modules open for user programmability to add SoC specific logic.

The CEVA-XC323 silicon was manufactured in a 65nm process and includes the CEVA-XC323 DSP, Power Scaling Unit (PSU), two XC-DMA controllers, program cache, 512 KB L1 data and 1MB shared L2 memory, external 64/128-bit AXI master and slave interfaces, 32-bit master APB interface, multiple efficient master/slave memory interfaces, Power Management Unit (PMU), Timers, Interrupt Control Unit (ICU) and GPIOs.

www.ceva-dsp.com


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